Latches and Flip-Flops — Sequential Logic Circuits -

🔁 Sequential Logic Circuits (Latches and Flip-Flops)

When you flip a light switch, it stays in that position until you move it again — right?
Now imagine if a circuit could do the same: remember its current state until told to change it.

That’s exactly what sequential logic circuits do!
Unlike combinational circuits, which only depend on current inputs, sequential circuits remember past information too.

They have memory — and that memory comes from latches and flip-flops.

🧠 What Makes Sequential Circuits Different?

In combinational logic, outputs change immediately when inputs change.
But in sequential logic, the output also depends on what happened before.

You can think of it like a person who not only listens to what you say now but also remembers what you said earlier.

🔹 Latches – The Basic Memory Element

A latch is the simplest form of memory in digital electronics.
It “latches onto” a value and keeps holding it until something tells it to change.

There are two common types of latches:

SR Latch (Set-Reset Latch)
D Latch (Data or Delay Latch)

🧩 1. SR Latch (Set-Reset Latch)

This latch is built using two NOR or NAND gates connected in a special feedback loop.
It has two inputs — S (Set) and R (Reset) — and two outputs, Q and Q’ (Q bar).

Here’s a simple diagram using NOR gates:

        +--------+           +--------+
 S ---> |        |           |        |
        |  NOR   |---Q------>|  NOR   |--- Q'
        |  Gate1 |           |  Gate2 |
 R ---> |        |           |        |
        +--------+           +--------+
              ^                    |
              |____________________|

🧠 How It Works:

| S | R | Q (Next State) | Description |
| – | – | ————– | ————————- |
| 0 | 0 | No change | Latch holds memory |
| 1 | 0 | 1 | Set → output becomes 1 |
| 0 | 1 | 0 | Reset → output becomes 0 |
| 1 | 1 | Invalid | Not allowed (both active) |

👉 When Set (S = 1), output Q becomes 1.
👉 When Reset (R = 1), output Q becomes 0.
👉 When both are 0, the latch “remembers” its last state.

It’s like a simple memory switch that can remember whether it was turned “on” or “off.”

💡 Real-Life Example:

Think of a lamp with two buttons: one for turning it on (Set) and one for turning it off (Reset).
If you don’t press any button, the lamp just stays in its previous state — on or off.
That’s exactly what the SR latch does.

🟦 2. D Latch (Data or Delay Latch)

The D Latch was invented to solve the “invalid state” problem of the SR latch.
It has only one input (D) and one enable/control input (E).

Here’s how it looks:

           +--------+
   D ----->|        |
            \       |
             > D LATCH|---- Q
   E ----->/        |
           +--------+

🧠 Working:

When Enable (E) = 1 → Output follows input D.
When Enable (E) = 0 → Output remains the same (latched).

So, when E is active, the latch is “open” and D flows through.
When E goes low, it “closes” and holds that value.

It’s like a small door that lets information in only when you allow it.

🔸 Flip-Flops – The Clock-Controlled Memory

While latches respond immediately to input changes (level-triggered),
flip-flops only change state at specific moments — usually when a clock signal ticks.

That’s why flip-flops are called edge-triggered devices.

In simple terms:

Latch: Changes whenever inputs change (within the active level).
Flip-Flop: Changes only when the clock edge arrives (like a heartbeat).

🧱 Types of Flip-Flops

Here are the most common types of flip-flops:

SR Flip-Flop
– Clock-controlled version of the SR Latch.
D Flip-Flop
– Transfers input D to output Q on each clock pulse.
JK Flip-Flop
– Modified SR Flip-Flop that removes the “invalid” condition.
When both J and K are 1, the output toggles.
T Flip-Flop (Toggle Flip-Flop)
– Toggles the output (1→0 or 0→1) on each clock edge when T = 1.

🕒 Example: D Flip-Flop Diagram

        +---------------------------+
        |        D FLIP-FLOP        |
   D --->| D                 Q ---->|
         |       CLK                 |
         +---------------------------+

🧠 Working:

When the clock edge (say, rising edge) occurs, the value of D is “captured.”
That value stays at the output Q until the next clock tick.

💡 Analogy to Understand Flip-Flops

Imagine taking a photo with your phone.

The scene (input) keeps changing.
The camera (flip-flop) captures it only when you press the shutter (clock pulse).
The photo (output) remains frozen until you take another shot.

That’s how flip-flops work — they “capture” input data at specific times and hold it steady.

🧾 Summary Table

Type	Inputs	Trigger Type	Function
SR Latch	S, R	Level	Set or Reset memory
D Latch	D, Enable	Level	Store single data bit
SR Flip-Flop	S, R, Clock	Edge	Clock-controlled SR latch
D Flip-Flop	D, Clock	Edge	Transfers D to Q on clock
JK Flip-Flop	J, K, Clock	Edge	Toggles or sets/reset
T Flip-Flop	T, Clock	Edge	Toggles output each pulse