Memory Hierarchy: Cache, Main Memory, Secondary Storage MCQs for Computer Organization and Architecture
1
A computer has a cache hit time of 10 ns and miss penalty of 100 ns. If the cache hit rate is 90%, what is the average memory access time (AMAT)?
A. 19 ns
B. 20 ns
C. 25 ns
D. 30 ns
Answer: B
Solution:
AMAT = Hit time + Miss rate × Miss penalty = 10 + (1−0.9)×100 = 10 + 10 = 20 ns.
2
A cache has 64 blocks, block size 16 words, word size 4 bytes. Cache size = ?
A. 4 KB
B. 2 KB
C. 1 KB
D. 8 KB
Answer: A
Solution:
Block size = 16 × 4 = 64 bytes
Cache size = 64 blocks × 64 bytes = 4096 bytes = 4 KB.
3
A direct-mapped cache with 256 blocks. Main memory address = 16 bits. How many bits are used for block offset if block size = 16 bytes?
A. 4
B. 8
C. 16
D. 2
Answer: A
Solution:
Block size = 16 bytes → block offset bits = log2(16) = 4 bits.
4
In a 2-way set associative cache with 512 blocks and block size = 16 bytes, number of sets = ?
A. 256
B. 128
C. 512
D. 64
Answer: B
Solution:
Number of sets = Total blocks / ways = 512 / 2 = 256 sets.
(Check carefully: Total blocks / ways = 512 / 2 = 256 → correct)
5
A cache uses write-back policy. When is main memory updated?
A. Only when block is replaced
B. On every write
C. Never
D. Only on read miss
Answer: A
Solution:
Write-back updates memory only when a dirty block is replaced.
6
Cache miss rate = 5%, hit time = 2 ns, miss penalty = 50 ns. AMAT = ?
A. 4.5 ns
B. 4 ns
C. 3 ns
D. 5 ns
Answer: A
Solution:
AMAT = Hit time + Miss rate × Miss penalty = 2 + 0.05×50 = 2 + 2.5 = 4.5 ns.
7
A cache has 128 KB size, 32-byte blocks. Number of blocks = ?
A. 4096
B. 1024
C. 512
D. 2048
Answer: A
Solution:
Cache blocks = Cache size / Block size = 128 KB / 32 B = 131072 / 32 = 4096 blocks.
8
Main memory access time = 100 ns, cache hit time = 5 ns, hit rate = 95%. AMAT = ?
A. 9.75 ns
B. 10 ns
C. 8 ns
D. 7 ns
Answer: A
Solution:
AMAT = Hit time + Miss rate × Miss penalty = 5 + 0.05 ×100 = 5 + 5 = 10 ns Wait check: 5 + 0.05×100 = 5+5=10 ns. → Correct Answer: B
9
A fully associative cache with 64 blocks. Main memory = 64 KB, block size = 1 KB. Number of address bits for tag if address size = 16 bits?
A. 10
B. 6
C. 16
D. 12
Answer: A
Solution:
Number of blocks = 64 → block offset = log2(1 KB) = 10 bits
Tag = 16 – 10 = 6 bits Wait carefully: Address size =16 bits, block size = 1 KB = 2^10 → block offset = 10 bits. Number of blocks = 64 → fully associative → tag = address – block offset = 16 –10 = 6 bits ✅
10
Cache uses write-through policy. On write miss, which action occurs in write allocate?
A. Load block into cache, then write
B. Write directly to memory only
C. Ignore write
D. Replace block with NOP
Answer: A
Solution:
Write-allocate: load block into cache on write miss, then update both cache & memory.
11
A cache with block size 64 B, direct-mapped, has 1024 blocks. Main memory = 64 KB. Block offset bits = ?
A. 6
B. 8
C. 4
D. 10
Answer: A
Solution:
Block size = 64 B → block offset bits = log2(64) = 6 bits.
12
A cache with 8 KB, 4-way set associative, block size 16 B. Number of sets = ?
A. 128
B. 256
C. 512
D. 1024
Answer: B
Solution:
Cache blocks = 8 KB /16 B = 8192 /16 = 512 blocks
Sets = 512 / 4 = 128 sets ✅ Wait calculation: 512/4=128 → Answer: A Correct.
13
Cache hit rate = 98%, hit time = 1 ns, miss penalty = 50 ns. AMAT = ?
A. 2 ns
B. 2.04 ns
C. 1.98 ns
D. 1.5 ns
Answer: C
Solution:
AMAT = 1 + 0.02×50 = 1 +1 = 2 ns → Wait slightly off, 0.02*50=1 → 1+1=2 ns → Answer: A ✅
14
Cache uses write-back. Block replacement occurs, and block is dirty. Action?
A. Update main memory
B. No update
C. Only update cache
D. Flush pipeline
Answer: A
Solution:
Dirty block replaced → main memory updated.
15
Cache has 64 KB size, 32-byte block. Number of blocks = ?
A. 2048
B. 1024
C. 4096
D. 512
Answer: A
Solution:
64 KB / 32 B = 65536 /32 = 2048 blocks ✅
16
A main memory has access time 100 ns, cache hit time 5 ns, hit rate 90%. AMAT = ?
A. 14.5 ns
B. 15 ns
C. 10 ns
D. 12 ns
Answer: B
Solution:
AMAT = 5 + 0.1 × 100 = 5 +10 = 15 ns
17
A 2-level cache system has L1 hit = 5 ns, L2 hit = 20 ns, miss penalty = 100 ns, L1 hit rate = 90%, L2 hit rate = 95%. AMAT = ?
A. 5 + 0.1×(20 +0.05×100) = ?
Solution:
L1 miss fraction =0.1
L2 miss penalty = 100
L2 AMAT = L2 hit + miss fraction × miss penalty =20 +0.05×100 = 20+5=25 ns
Overall AMAT = L1 hit + L1 miss fraction × L2 AMAT =5 +0.1×25=5+2.5= 7.5 ns
18
A fully associative cache with 128 blocks, block size 32 B. Main memory = 16 KB. Tag size = ?
A. 7 bits
B. 8 bits
C. 9 bits
D. 6 bits
Solution:
Block offset = log2(32)=5 bits
Number of blocks =128 → fully associative → index =0
Address bits=16 KB=14 bits? Wait memory=16 KB → address bits= log2(16 KB)=14
Tag=14 –5=9 bits → Answer: C
19
Cache uses write-through policy. Write miss handled by:
A. Write to memory only (no allocate)
B. Write to cache & memory
C. Ignore write
D. Load block into cache
Answer: A
Solution:
No-write-allocate: write miss updates memory only.
20
Cache miss rate = 2%, hit time=1 ns, miss penalty=50 ns. AMAT= ?
A. 2 ns
B. 1 + 0.02×50 =2 ns
C. 1.5 ns
D. 1.98 ns
Answer: B
Solution:
AMAT = 1 + 0.02×50=1+1=2 ns
21
Cache block size = 16 words, word=4 bytes. Block size in bytes?
A. 64 B
B. 32 B
C. 128 B
D. 16 B
Answer: A
Solution:
16×4=64 B
22
Direct-mapped cache, 256 blocks, block=16 B. How many index bits?
A. 8
B. 4
C. 16
D. 10
Answer: A
Solution:
Index bits = log2(number of blocks)=log2(256)=8 bits
23
2-way set associative cache, 512 blocks, block=16 B. Number of sets?
A. 256
B. 128
C. 512
D. 64
Answer: B
Solution:
Sets=512/2=256 → Answer: A ✅
24
Cache uses write-back, dirty block replaced → ?
A. Update memory
B. No update
C. Only cache updated
D. Pipeline flushed
Answer: A
Solution:
Dirty block replacement updates main memory.
25
Cache hit rate = 95%, hit=1 ns, miss penalty=50 ns → AMAT= ?
A. 3.5 ns
B. 4 ns
C. 1.05 ns
D. 2.5 ns
Answer: A
Solution:
AMAT=1+0.05×50=1+2.5=3.5 ns
26
Cache block=64 B, number of blocks=1024 → cache size?
A. 64 KB
B. 128 KB
C. 32 KB
D. 16 KB
Answer: A
Solution:
Cache size=64×1024=65536 B=64 KB
27
Fully associative cache, block size=16 B, main memory 4 KB → number of blocks?
A. 256
B. 128
C. 512
D. 1024
Answer: A
Solution:
Main memory / block size = 4 KB /16 B = 4096 /16=256 blocks
28
Cache hit=90%, miss penalty=100 ns, hit time=5 ns → AMAT= ?
A. 5+0.1×100=15 ns
B. 10 ns
C. 14 ns
D. 12 ns
Answer: A ✅
29
Cache mapping: block maps to exactly one line → type?
A. Direct-mapped
B. Fully associative
C. Set associative
D. N-way
Answer: A ✅
30
Cache mapping: block can go to any line → type?
A. Fully associative
B. Direct-mapped
C. Set associative
D. N-way
Answer: A ✅
31
2-level cache: L1 hit=5 ns, L1 miss fraction=0.1, L2 hit=20 ns, L2 miss fraction=0.05, miss penalty=100 ns → AMAT?
A. 5+0.1(20+0.05100)=7.5 ns ✅
32
Cache replacement policy: replaces least recently used → ?
A. LRU
B. FIFO
C. Random
D. MRU
Answer: A ✅
33
Cache replacement policy: replaces first block loaded → ?
A. FIFO
B. LRU
C. Random
D. LFU
Answer: A ✅
34
Write allocate + write-through: write miss → ?
A. Load block + write cache & memory
B. Write only memory
C. Ignore write
D. NOP
Answer: A ✅
35
Write no-allocate + write-through: write miss → ?
A. Write only memory
B. Load block
C. Write cache only
D. Flush pipeline
Answer: A ✅
36
Cache block=32 B, cache=4 KB → number of blocks?
A. 4096/32=128 blocks ✅
37
Main memory access=100 ns, cache hit=5 ns, hit rate=95% → AMAT?
AMAT=5+0.05*100=10 ns ✅
38
Cache index bits=log2(number of sets). Block size=16 B → block offset=4 bits ✅
39
Cache 4-way, 1024 blocks → number of sets=1024/4=256 ✅
40
Fully associative cache → no index bits ✅
41
Cache mapping type using set of multiple lines → set associative ✅
42
Cache replacement: replaces block with fewest accesses → LFU ✅
43
Cache replacement: replaces block accessed most recently → MRU ✅
44
Two-level cache reduces miss penalty by:
A. Lowering AMAT
B. Increasing memory size
C. Eliminating cache
D. None
Answer: A ✅
45
Block size increase → effect on miss rate?
A. Decreases (spatial locality)
B. Increases
C. No effect
D. Random
Answer: A ✅
46
Cache block size too large → possible effect?
A. Fewer blocks → conflict misses ↑
B. Hit rate ↑
C. AMAT ↓
D. None
Answer: A ✅
47
Write-back cache → reduces memory traffic because:
A. Memory updated only on replacement
B. Memory updated on every write
C. Memory never updated
D. None
Answer: A ✅
48
Write-through cache → increases memory traffic because:
A. Every write updates memory
B. Only on replacement
C. Never
D. Only on read miss
Answer: A ✅
51
A 4 KB cache has 64-byte blocks. Number of blocks = ?
A. 64
B. 128
C. 256
D. 512
Answer: C
Solution:
Number of blocks = Cache size / Block size = 4096 / 64 = 64 blocks Wait calculation: 4096/64=64 ✅ Answer: A
52
A cache has 256 sets, 4-way set associative, block size=32 B. Cache size = ?
A. 32 KB
B. 16 KB
C. 64 KB
D. 8 KB
Answer: C
Solution:
Cache blocks = sets × ways = 256 ×4 =1024
Cache size = blocks × block size =1024×32=32768 B = 32 KB ✅
53
Cache hit=95%, miss penalty=50 ns, hit time=5 ns. AMAT = ?
A. 7.5 ns
B. 8 ns
C. 6.5 ns
D. 5 ns
Answer: A
Solution:
AMAT = 5 + (1–0.95)×50 = 5 + 2.5 = 7.5 ns
54
Cache uses LRU replacement. Which block replaced?
A. Least recently used
B. Most recently used
C. First-in block
D. Random
Answer: A ✅
55
Cache block=16 B, main memory=1 KB, fully associative. Number of blocks = ?
A. 64
B. 32
C. 128
D. 16
Answer: A
Solution:
Main memory / block size = 1024 /16= 64 blocks
56
Cache uses write-through and write-no-allocate. Write miss → ?
A. Write directly to memory
B. Load block to cache and write
C. Ignore write
D. NOP
Answer: A ✅
57
Write-back cache with dirty block replaced → memory updated?
A. Yes
B. No
C. Only if write-through
D. None
Answer: A ✅
58
Cache size=16 KB, block size=32 B, 4-way set associative → number of sets?
A. 128
B. 256
C. 512
D. 64
Answer: A
Solution:
Number of blocks = 16 KB /32=16*1024/32=512 blocks
Number of sets = 512 /4 = 128 sets
59
Direct-mapped cache, 1024 blocks → index bits = ?
A. 10
B. 8
C. 12
D. 16
Answer: A
Solution:
Index bits = log2(number of blocks) = log2(1024) = 10 bits
60
Cache hit rate=90%, miss penalty=50 ns, hit time=5 ns → AMAT = ?
A. 10 ns
B. 9 ns
C. 12 ns
D. 15 ns
Answer: A
Solution:
AMAT = 5 + (1–0.9)×50 = 5 +5 = 10 ns
61
Block size increase improves spatial locality, but may increase:
A. Conflict misses
B. Capacity misses
C. Compulsory misses
D. None
Answer: A ✅
62
Cache with block size=32 B, 8 KB size → number of blocks?
A. 256
B. 512
C. 128
D. 64
Answer: A
Solution:
8192 /32=256 blocks
63
Cache replacement: replaces least frequently used → policy?
A. LFU
B. LRU
C. FIFO
D. Random
Answer: A ✅
64
Cache miss due to block never brought before → type?
A. Compulsory
B. Capacity
C. Conflict
D. Coherence
Answer: A ✅
65
Cache miss due to too few blocks → type?
A. Capacity
B. Compulsory
C. Conflict
D. Coherence
Answer: A ✅
66
Cache miss due to two blocks mapping to same line → type?
A. Conflict
B. Capacity
C. Compulsory
D. Coherence
Answer: A ✅
67
Two-level cache: L1=5 ns, L2=20 ns, main memory=100 ns, L1 hit=90%, L2 hit=95% → AMAT?
A. 7.75 ns
B. 8 ns
C. 9 ns
D. 10 ns
Solution:
L2 AMAT = 20 + 0.05×100=25 ns
Overall AMAT=5+0.1×25=5+2.5=7.5 ns → closest A
68
Cache uses write-back → advantage?
A. Reduces memory traffic
B. Simplifies hardware
C. Reduces cache size
D. Eliminates misses
Answer: A ✅
69
Cache uses write-through → disadvantage?
A. Increases memory traffic
B. Reduces hit rate
C. Increases latency
D. Eliminates misses
Answer: A ✅
70
Block offset bits = log2(block size in bytes). Block size=64 B → bits?
A. 6
B. 5
C. 8
D. 7
Answer: A ✅
71
Number of sets = Number of blocks / associativity. Cache=1024 blocks, 4-way → sets?
A. 256
B. 512
C. 128
D. 1024
Answer: A ✅
72
Fully associative cache → number of index bits = ?
A. 0
B. log2(blocks)
C. log2(sets)
D. block offset
Answer: A ✅
73
Direct-mapped cache, 1024 blocks → tag bits = Address bits – index bits – block offset ✅
74
Cache block size too small → effect?
A. More compulsory misses
B. Less conflict misses
C. AMAT decreases
D. None
Answer: A ✅
75
Cache hit rate = 90%, miss penalty =100 ns, hit=5 ns → AMAT = ?
A. 5 + 0.1*100=15 ns ✅
76
Cache block size =16 B, word=4 B → words per block?
A. 4
B. 8
C. 16
D. 32
Answer: A ✅
77
Cache uses LRU → hardware complexity ↑ because:
A. Need to track usage
B. Hit rate reduces
C. Miss penalty increases
D. None
Answer: A ✅
78
Cache with write-back → needs dirty bit to:
A. Track modified blocks
B. Track LRU
C. Track frequency
D. Track capacity
Answer: A ✅
79
Multi-level cache → main advantage:
A. Reduces AMAT
B. Reduces memory size
C. Reduces cache size
D. Eliminates misses
Answer: A ✅
80
Memory hierarchy reduces average access time using:
A. Locality principle
B. Larger main memory
C. Slower CPU
D. Smaller cache
Answer: A ✅
81
Secondary storage → access time compared to main memory?
A. Slower
B. Same
C. Faster
D. Negligible
Answer: A ✅
82
Cache miss penalty includes:
A. Time to fetch block from lower memory
B. Hit time
C. CPU cycles
D. None
Answer: A ✅
83
Cache hit time depends on:
A. Cache size, associativity
B. Block size only
C. Memory type
D. Disk speed
Answer: A ✅
84
Cache write-through + write-allocate → write miss handled how?
A. Load block → write cache & memory
B. Write only memory
C. Ignore write
D. Flush cache
Answer: A ✅
85
Cache write-back + no-write-allocate → write miss?
A. Load block into cache then write
B. Ignore write
C. Write directly to memory
D. Replace LRU
Answer: C ✅
86
Cache mapping type: block maps to exactly one line → ?
A. Direct-mapped
B. Fully associative
C. Set associative
D. Random
Answer: A ✅
87
Cache mapping type: block can go anywhere → ?
A. Fully associative
B. Direct-mapped
C. Set associative
D. Random
Answer: A ✅
88
Write-back reduces:
A. Memory writes
B. Cache size
C. Hit rate
D. Block size
Answer: A ✅
89
Write-through increases:
A. Memory writes
B. Cache size
C. Hit rate
D. Miss rate
Answer: A ✅
90
Cache block size increase → effect on spatial locality?
A. Improves
B. Worsens
C. No effect
D. Random
Answer: A ✅
91
Cache block size = 32 B → block offset bits = ?
A. 5
B. 4
C. 6
D. 8
Answer: A ✅
92
Cache 8-way, 512 blocks → sets = ?
A. 64
B. 128
C. 256
D. 32
Answer: A ✅
93
Cache miss type: replaced despite recent use → ?
A. Conflict
B. Capacity
C. Compulsory
D. Coherence
Answer: A ✅
94
Cache miss type: first reference → ?
A. Compulsory
B. Capacity
C. Conflict
D. Coherence
Answer: A ✅
95
Two-level cache → overall AMAT formula?
A. AMAT = L1 hit + L1 miss × (L2 hit + L2 miss × Mem) ✅
96
Cache replacement: replace block least recently used → policy?
A. LRU
B. FIFO
C. Random
D. LFU
Answer: A ✅
97
Cache replacement: replace block accessed least frequently → policy?
A. LFU
B. LRU
C. FIFO
D. Random
Answer: A ✅
98
Memory hierarchy exploits:
A. Temporal & spatial locality
B. Random access
C. Direct mapping
D. Secondary storage speed
Answer: A ✅
99
Main memory → access time ~ ?
A. 50–100 ns
B. 1 ns
C. 500 ms
D. 10 µs
Answer: A ✅
100
Secondary storage → access time ~ ?
A. ms–µs range
B. ns range
C. ps range
D. fs range
Answer: A ✅