I/O Interface, Interrupts, and DMA Mode MCQs
I/O Interface, Interrupts, and DMA Mode MCQs 1 In programmed I/O, the CPU waits until the I/O operation is complete. …
I/O Interface, Interrupts, and DMA Mode MCQs 1 In programmed I/O, the CPU waits until the I/O operation is complete. …
Memory Hierarchy: Cache, Main Memory, Secondary Storage MCQs for Computer Organization and Architecture 1 A computer has a cache hit …
Instruction Pipelining and Pipeline Hazards MCQs 1 A 5-stage instruction pipeline has stage delays: IF=200 ps, ID=150 ps, EX=250 ps, …
Datapath and Control Unit — 100 MCQs (with solutions) 1 In a single-cycle MIPS datapath the ALU input B can …
ALU MCQs for Gate Exam 1 (Two’s-complement addition / overflow)Add the 8-bit two’s-complement numbers 0x7A and 0x3C. Which is correct?A. …
Machine Instructions and Addressing Modes (Computer Organization & Architecture) Each question has options A–D, the correct answer, and a detailed …
Number representations and computer arithmetic MCQs for Gate Exam Q1. Convert (110101)₂ to decimal.A. 45B. 52C. 53D. 54 Answer: CSolution:(110101)₂ …
Minimization MCQs in Digital Logic Q1 — Minimize (F(A,B,C)=\sum m(1,2,3,5)).A) (B\overline{C} + \overline{A}C)B) (\overline{A}B + AC)C) (\overline{A}B + \overline{B}C)D) (A\overline{B} …
Combinational and Sequential Circuits MCQs 1. In a 4-bit binary adder using full adders, if input A = 1011 and …
Boolean Algebra MCQs in Digital Logic Format used for each item:Q# — (Question)A) … B) … C) … D) …Answer: …